Three different curves have been sharing one name for sixty years.

Chapter 7 gave you the reason the whole industry spent fifty years making transistors smaller. Drain current scales with W/L, so a shorter channel gives more current from the same gate voltage, and more current into the same capacitance means a faster switch. Smaller was not a tidiness exercise. Smaller was faster, and it was cheaper, and it was lower power, all at once, and that happy coincidence is what people are actually pointing at when they say “Moore’s Law”.

The misconception

“Moore’s Law is one law, and the only real question is whether it is alive or dead.” You will see this argued in both directions by people who know what they are talking about, which should already be a clue that something is wrong with the question. Jensen Huang says it is dead. TSMC keeps shipping denser nodes on schedule and says it is not. They are not disagreeing about the facts. They are answering different questions with the same three words.

At least three distinct curves get collapsed into that one name:

1. Transistor count. How many switches fit on one chip. This is the curve people usually draw.
2. Dennard scaling. Whether shrinking also buys you speed and power for free. Named for Robert Dennard, whose 1974 paper in the IEEE Journal of Solid-State Circuits showed that if you scale voltage and current down along with the dimensions, power per unit area stays constant — so you get more transistors and a higher clock, at the same power.
3. Cost per transistor. Whether each new generation makes a switch cheaper to buy. This is the one Moore himself was actually writing about.

That last point is not a technicality. Moore’s 1965 article in Electronics carried the subtitle “With unit cost falling as the number of components per circuit rises, by 1975 economics may dictate squeezing as many as 65,000 components on a single silicon chip.” The body of the paper talks about “the complexity for minimum component costs”. It was an argument about economics that happened to be expressed in transistors. Sixty years of retelling turned it into a claim about physics.

Reading the bench

The bench plots each curve as doublings rather than raw numbers, because raw numbers are useless here: transistor counts span eight decades and clock speeds span four, so on any shared axis one of them is a flat line at the bottom. Doublings fix that. The slope of each line is doublings per year, and a slope you can compare across curves is exactly what the argument needs. A flat line means the curve has stopped improving.

Drag the two window sliders and the curves re-zero to the left edge of your window, so you are always looking at what happened inside the years you selected. The doubling times in the meters are least-squares fits through the real data points in that window, not smoothed or drawn by hand.

Curve one: count. Still going, and that is the honest answer

Fit the transistor curve over 1971–2004 and it doubles every 2.09 years. Fit it over 2004–2026 and it doubles every 2.13 years. Fifty-five years, one slope, straight through every announced death of Moore’s Law. Anyone who tells you transistor counts stopped growing is simply wrong, and the bench will show you why in about four seconds.

There is a catch, and it matters. Some of that recent growth is no longer coming from smaller transistors. Nvidia’s B200 reaches 208 billion by putting two separate pieces of silicon in one package and wiring them together; its Rubin successor reaches 336 billion with two compute dies plus two more for input and output. A reticle is the largest area a lithography machine can pattern in one exposure, and both parts are pressed against it. So “transistors per chip you can buy” and “transistors per square millimetre” have themselves begun to separate. Count is still doubling. Density is doing less of the work than it used to.

Curve two: Dennard. Died first, and died hardest

Dennard’s bargain broke somewhere around 2005. Two things refused to shrink: threshold voltage, and the subthreshold slope — a limit Dennard’s own 1974 paper names explicitly, writing that one must simply accept that subthreshold behaviour does not scale as desired. Because the threshold could not come down, the supply voltage could not come down either, and once supply voltage stops falling, power density starts climbing with every shrink. That is the power wall. Intel cancelled its Tejas and Jayhawk processors in 2004 rather than ship them, and the industry turned sideways into multiple cores instead of upward into higher clocks.

Put numbers on it. Clock speed doubled every 2.67 years from 1971 to 2004. From 2004 to 2026 it doubles every 23 years — and even that overstates the case, because the last three records are two-core boost clocks rather than the all-core speeds the older parts quoted. The engine did not slow down. It stopped, and everything since has been the last of the coasting.

Be careful with what died. Performance per watt did not stop improving. Jonathan Koomey’s work on computations per joule found a doubling every 1.57 years across the whole computer age, and on re-examining the data he found the doubling had slowed to about 2.6 years after 2000. Slower, by a lot — a hundredfold gain per decade became a sixteenfold one — but not stopped. What stopped dead was the free clock speed. Those are different claims and only one of them is a flat line.

Curve three: cost. Nobody agrees, and that is the finding

This is where you need a little vocabulary, because the cost curve is not a physics result. It is a price, and prices have interested parties attached.

So the cost of a transistor is, roughly, the price of a wafer divided by the number of working transistors you get off it. Density pushes that number down. Wafer price pushes it up. For decades density won comfortably. The question is whether it still does, and here the sources genuinely contradict each other.

Take the last row seriously, because it is arithmetic you can do yourself. Twenty times the transistors for 3.6 times the wafer price, with die area staying inside the 80–125 mm² band Bajarin reports across the whole family, is about 5.6 times more transistors per dollar over eleven years — a doubling every 4.5 years or so. That is not flat. But it is not Moore’s Law either: at a two-year doubling those eleven years should have bought a factor of 45.

A warning about the numbers on the boxes

“3 nm” is a marketing name. Nothing on a 3 nm chip measures three nanometres. The link between node name and any physical dimension broke in the late 1990s: Intel’s 0.13 µm process, shipping in 2001, had 70 nm gates, and its 22 nm process had 35 nm gates on 8 nm-wide fins. Chenming Hu, who co-invented the FinFET, told an IEEE Spectrum reporter in 2013 that nobody knows any more what 16 or 14 nm means. Intel’s Mark Bohr said in the same piece that he could not point to the one dimension that is 22 or 14 nm. The IRDS roadmap’s 2018 edition lists the physical gate length at the “3 nm” node as 16 nm.

Density figures are contested in the same way, and for the same reason: there is no agreed measurement. When Intel published 100 million transistors per mm² for its 10 nm process, a TSMC spokesperson asked EE Times whether Intel was playing paper games, pointing out that the same Broadwell part had been quoted at 18.4 million per mm² under the old metric and 37.5 under the new one. When you read a density number, find out whose ruler it was measured with.