The circuit everyone calls a current copier is really a voltage copier.

Every circuit so far has fed its transistors from a resistor tied to the supply. That works, and chapters 4 and 5 spent a lot of effort on the consequences. But a resistor does not deliver a current. It delivers a voltage difference divided by itself, and the moment the far end moves, the current moves with it.

A current source is defined by what it refuses to do: it holds its current fixed no matter what voltage appears across it. Its figure of merit is therefore an output resistance — how many volts you must force across it to shift its current by one amp. For a resistor R used as a source, the output resistance is exactly R, which is also the thing setting the current. You cannot have both. Want 1 mA from 10 V? That is 10 kΩ, and 10 kΩ is your output resistance, and it is nowhere near enough.

A transistor in the active region has the property you want built in. Its collector current is set by V_BE and is nearly indifferent to V_CE — nearly, because of the Early effect from chapter 5, which gives the flat part of the output curve a slight upward tilt. That tilt is r_o = V_A/I_C, and at 1 mA with V_A = 75 V it is about 75 kΩ. Same order as the resistor, you might think — but the transistor gets that 75 kΩ while passing 1 mA at almost any collector voltage you like, which the resistor cannot do at all.

Compliance is the price

The transistor holds its current only while it stays in the active region. Drop V_CE below roughly 0.2 V and the collector junction forward-biases, the device saturates, and the current falls away fast. So a current source is not a magic component: it is a component that works over a stated voltage window and does nothing useful outside it. On a 10 V rail an ordinary grounded-emitter source gives you compliance from about 0.2 V up to the rail, and every improvement in the rest of this chapter costs some of that window back.

Lesson 1 left a problem. A transistor makes a fine current source, but only if something holds its V_BE at exactly the right value — and V_BE is the most temperature-sensitive, part-to-part-variable quantity in the whole device. A divider that sets 0.65 V will be wrong by tens of percent in current, and will drift badly. So you cannot set the current by setting a voltage.

The trick is to not set it at all. Take a second, identical transistor and diode-connect it — short its collector to its base. It is now forced into the active region with V_CB = 0, and whatever current you push into it, it develops exactly the V_BE that its own physics demands for that current. Connect that base node to the first transistor. If the two devices are identical, the same V_BE produces the same current.

The misconception

“A current mirror copies the reference current into the output branch.” It does not, and no wire in the circuit carries the reference current anywhere near the output transistor. What travels between the two halves is a voltage on the shared base node. The reference side converts a current into a V_BE using the exponential; the output side converts that V_BE back into a current using the same exponential. The copy is good only to the extent that the two exponentials are the same function, and every failure in lessons 3, 4 and 5 is a different way for them to differ.

Once you see it that way, the bench’s picture makes sense: both transistors sit on one exponential curve, at one V_BE, at two operating points that coincide. Drag the reference current and watch both dots slide along the same curve together.

Why this is a silicon circuit and not a breadboard one

Everything above depended on “identical”. Two transistors from the same bag differ in I_S by tens of percent, which lesson 5 will show is fatal. Two transistors laid down micrometres apart on the same die, in the same process step, at the same temperature, match to a fraction of a percent. That is the resource Part Two is spending. You cannot buy matching; you can only get it by making both devices at once.

Fifty times the current, one tenth of a volt of movement on the node that carries the information.

The reference resistor delivers a current into the base node. That current does not all go into the diode-connected transistor’s collector. It has to supply two base currents as well — one for each transistor — before whatever is left becomes I_C1. Since I_out equals I_C1 when the devices match, the output is short by both base currents:

I_out/I_ref = 1/(1 + 2/β)

That is a systematic shortfall, always in the same direction, and it is set entirely by β. At β = 150 it is 1.32% low. At β = 20 — a cheap lateral PNP on an old process, or a power device run hard — it is 9.1% low, which is no longer a rounding error.

Two fixes, neither free

1. The beta-helper. Add a third transistor as an emitter follower feeding the shared base node. The reference branch now supplies only that device’s base current, so the error becomes 1/(1 + 2/β²) — at β = 150 that is 0.009%, a hundredfold improvement. Cost: one more V_BE of headroom on the reference side.
2. The Wilson mirror. Rearranges three transistors so that the base-current error largely cancels against itself, and raises output resistance at the same time. Cost: compliance again, and a more delicate layout.

Both are standard, both are in Sedra & Smith chapter 8, and both illustrate the pattern that runs through the whole of Part Two: on a die, transistors are cheaper than precision, so you fix an error by spending devices rather than by specifying tighter parts.

The two transistors share a base voltage, but they do not share a collector voltage. The reference device is diode-connected, so its V_CE is pinned at V_BE, about 0.65 V. The output device’s collector goes wherever the circuit it is driving puts it — possibly 9 V. Two identical transistors at the same V_BE but very different V_CE do not carry the same current, because of the base-width modulation you met in chapter 5.

Measured on the bench, this mirror’s output climbs from 0.996 mA at V_out = 1 V to 1.102 mA at 9 V — a 10.6% drift with nothing changed but the load voltage. The slope of that line is the output resistance, and the bench measures 76.0 kΩ, steady across the whole sweep.

Worth noticing: 76 kΩ is a little above the textbook V_A/I_C, which at this current reads about 74 kΩ and falls as V_out rises. The gap is real and it is not arithmetic. In the transport model these benches actually solve, r_o works out as (V_A + V_CE − V_BE)/I_C, which is why the measured value stays flat while V_A/I_C falls as the current rises with V_out. V_A/I_C is the right first answer and the one to carry in your head; it is a few percent optimistic about how fast r_o degrades.

Why stacking works

The cascode device is a common-base stage. Its emitter is a low-impedance node — about r_e, which at 1 mA is 26 Ω — so when V_out moves by a volt, almost none of that movement reaches the node below. What little does get through is divided down by the cascode’s own gain. The result is the standard R_out ≈ β r_o, and it is the single most useful structure in analogue IC design after the mirror itself.

The cost is stated plainly by the bench: the lower transistor now needs its 0.2 V of V_CE, and the cascode needs its own, and the cascode’s base sits a V_BE above that. The bench’s floor meter moves from 0.24 V to 1.39 V. On a 10 V rail that is a fair trade. On the 1.2 V rail of a modern digital process it is most of your supply, which is why chapter 11’s world looks so different.

Lesson 2 said the mirror copies a voltage across a shared node. That is its strength — and it is also why it is so unforgiving. If the two devices are not quite identical, the output transistor produces the wrong current for the V_BE it is handed, and the exponential magnifies the discrepancy.

Put a number on it. The bench applies a deliberate offset by scaling one device’s saturation current, which is equivalent to an effective V_BE mismatch ΔV:

One millivolt — less than the offset voltage of a decent op-amp, less than the thermal EMF of a solder joint — costs you 4% of current. Ten millivolts, easily achievable with two transistors from the same bag, costs you nearly half. This is the arithmetic that makes discrete current mirrors a bad idea and integrated ones excellent, and it is why lesson 2 insisted the matching is the resource.

Degeneration, and what it costs

An emitter resistor in each leg is called degeneration, and it is the same negative feedback you met on the follower in chapter 3, used here to desensitise rather than to buffer. A mismatch ΔV now has to fight the I R drop across R_E instead of acting directly on the exponential, and the sensitivity falls by roughly (1 + R_E/r_e). It also raises the output resistance by the same factor, which is a second free-looking benefit.

The bill: R_E eats compliance. At 1 mA, 470 Ω costs 0.47 V off the top of your usable output range, permanently. And on an integrated die, resistors are physically large, poorly controlled in absolute value, and drift differently from transistors — which is why IC designers reach for degeneration far less often than a discrete designer would expect.

Mismatch is also a design tool

Deliberate mismatch, unlike accidental mismatch, is precise. Build the output transistor from m identical devices in parallel — or with m times the emitter area — and at the same V_BE it passes m times the current. The ratio is set by geometry, which a photolithographic process controls superbly, rather than by any absolute quantity. The bench measures 1.996 for a 2:1 layout and 3.94 for 4:1: close, and short by exactly the base-current error of lesson 3, which grows as m/(1 + (1+m)/β).

Chapter 5 derived a gain of −g_m(R_C ∥ r_o) and a ceiling of V_A/V_T ≈ 2,900, reached only in the limit R_C → ∞. And then it explained why you can never go there: the DC current has to flow through R_C, so a big resistor means a big drop, and the supply runs out long before the ceiling does.

The bench puts numbers on the impossibility. At 1 mA, a 1 kΩ collector resistor gives a gain of 38 and drops 1.00 V. Ten times the resistor would give 344 — but it needs 10.00 V across itself, which is the entire rail, so that bias point does not exist. A hundred times would give about 1,700 and demand 100 V across the resistor. The gain is there; the headroom is not, and the bench will simply refuse to bias the 10 kΩ case at 1 mA.

A current source has no such problem, because a current source is not a resistance to DC. Replace R_C with the output of a PNP mirror. To the bias point it is a 1 mA source, dropping whatever it must and no more. To a small signal it is r_o, which at 1 mA is tens of kilohms. You get the AC resistance without paying the DC penalty. That is an active load, and it is the reason mirrors are everywhere.

What you gave up to get it

A gain of 1,250 from one stage sounds free. It is not. The output node now has a very high impedance, so anything you connect to it — including the next stage’s input resistance — appears in parallel and can destroy the gain instantly. Loading a 30 kΩ node with a 30 kΩ input halves it. This is exactly why op-amps put an emitter follower after their gain stage, and why chapter 3’s buffer, which looked pointless at the time, turns out to be structural.

The second cost is bias. The stage only works when the NPN’s current and the PNP’s current are equal, and with a gain of 1,250 the input window over which the output is not slammed against a rail is about 6 mV — and by the time you cascode the load as well, microvolts. Nothing open-loop can hold that. It needs feedback — which is precisely chapter 8’s answer, arrived at from the other side.